Leakage in nanometer CMOS technologies [electronic resource] / [ed. by] Siva G. Narendra, Anantha Chandrakasan.
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumptio...
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Full Text (via Springer) |
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| Other Authors: | , |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
New York :
Springer,
2006.
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| Series: | Series on integrated circuits and systems.
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| Subjects: |
Internet
Full Text (via Springer)Online
| Call Number: |
TK7871.99.M44 L43 2006eb
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| TK7871.99.M44 L43 2006eb | Available |