Three-Dimensional Integration Technology for Advanced Focal Planes and Integrated Circuits [electronic resource]
Over the last five years MIT Lincoln Laboratory (MIT-LL) has developed a three-dimensional (3D) circuit integration technology that exploits the advantages of silicon-on-insulator (SOI) technology to enable wafer-level stacking and micrometer-scale electrical interconnection of fully fabricated circ...
Saved in:
Online Access: |
Online Access |
---|---|
Corporate Author: | |
Format: | Government Document Electronic eBook |
Language: | English |
Published: |
Washington, D.C. : Oak Ridge, Tenn. :
United States. Department of Energy. Office of Science ; distributed by the Office of Scientific and Technical Information, U.S. Department of Energy,
2007.
|
Subjects: |
Search Result 1
Three-Dimensional Integration Technology for Advanced Focal Planes and Integrated Circuits
Published 2007
Online Access
Government Document
Electronic
eBook