CMOS PLL synthesizers : analysis and design / Keliu Shu, Edgar Sánchez-Sinencio.
"CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state-of-the-art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis is given. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is...
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Main Author: | |
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Other Authors: | |
Format: | Book |
Language: | English |
Published: |
New York, N.Y. :
Springer,
©2005.
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Series: | Kluwer international series in engineering and computer science ;
783. Kluwer international series in engineering and computer science. Analog circuits and signal processing. |
Subjects: |
MARC
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100 | 1 | |a Shu, Keliu. |0 http://id.loc.gov/authorities/names/nb2005007650. | |
245 | 1 | 0 | |a CMOS PLL synthesizers : |b analysis and design / |c Keliu Shu, Edgar Sánchez-Sinencio. |
260 | |a New York, N.Y. : |b Springer, |c ©2005. | ||
300 | |a xvi, 215 pages : |b illustrations ; |c 25 cm. | ||
336 | |a text |b txt |2 rdacontent. | ||
337 | |a unmediated |b n |2 rdamedia. | ||
338 | |a volume |b nc |2 rdacarrier. | ||
490 | 1 | |a Kluwer international series in engineering and computer science ; |v 783. |a Analog circuits and signal processing. | |
504 | |a Includes bibliographical references and index. | ||
520 | 1 | |a "CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state-of-the-art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis is given. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance multiplier, which tackle speed and integration bottlenecks of PLL synthesizers." "This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers."--BOOK JACKET. | |
650 | 0 | |a Metal oxide semiconductors, Complementary. |0 http://id.loc.gov/authorities/subjects/sh85084067. | |
650 | 0 | |a Phase-locked loops. |0 http://id.loc.gov/authorities/subjects/sh85100640. | |
650 | 0 | |a Frequency synthesizers |x Design and construction. | |
700 | 1 | |a Sánchez-Sinencio, Edgar. |0 http://id.loc.gov/authorities/names/n82216761 |1 http://isni.org/isni/000000010854692X. | |
830 | 0 | |a Kluwer international series in engineering and computer science ; |v 783. |0 http://id.loc.gov/authorities/names/n84749953. | |
830 | 0 | |a Kluwer international series in engineering and computer science. |p Analog circuits and signal processing. |0 http://id.loc.gov/authorities/names/n92072416. | |
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