CMOS PLL synthesizers : analysis and design / Keliu Shu, Edgar Sánchez-Sinencio.
"CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state-of-the-art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis is given. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is...
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| Main Author: | |
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| Other Authors: | |
| Format: | Book |
| Language: | English |
| Published: |
New York, N.Y. :
Springer,
©2005.
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| Series: | Kluwer international series in engineering and computer science ;
783. Kluwer international series in engineering and computer science. Analog circuits and signal processing. |
| Subjects: |
Closed Stacks - Engineering Math & Physics Library - Stacks
| Call Number: |
TK7872.F73 S58 2005
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| TK7872.F73 S58 2005 | Available Place a Hold |