CMOS PLL synthesizers : analysis and design / Keliu Shu, Edgar Sánchez-Sinencio.
"CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state-of-the-art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis is given. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is...
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| Format: | Book |
| Language: | English |
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New York, N.Y. :
Springer,
©2005.
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| Series: | Kluwer international series in engineering and computer science ;
783. Kluwer international series in engineering and computer science. Analog circuits and signal processing. |
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| Summary: | "CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state-of-the-art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis is given. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance multiplier, which tackle speed and integration bottlenecks of PLL synthesizers." "This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers."--BOOK JACKET. |
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| Physical Description: | xvi, 215 pages : illustrations ; 25 cm. |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: | 0387236686 0387236694 (e-ISBN) |