Soft-switching PWM full-bridge converters : topologies, control, and design /

Soft-switching PWM full-bridge converters : topologies, control, and design / Xinbo Ruan, Nanjing University of Aeronautics and Astronautics, China.

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Bibliographic Details
Online Access: Full Text (via ProQuest)
Main Author: Ruan, Xinbo
Format: eBook
Language:English
Published: Singapore : Wiley/Science Press, 2014.
Subjects:
PWM power converters.
Switching power supplies.
PWM power converters
Table of Contents:
  • 1.4.4.Basic Operating Principle of a Full-Bridge Converter with a Current-Doubler Rectifier Circuit
  • 1.5.Summary
  • References
  • 2.1.PWM Strategies for Full-Bridge Converters
  • 2.1.1.Basic PWM Strategy
  • 2.1.2.Definition of On-Time of Power Switches
  • 2.1.3.A Family of PWM Strategies
  • 2.2.Two Types of PWM Strategy
  • 2.2.1.The Two Diagonal Power Switches Turn Off Simultaneously
  • 2.2.2.The Two Diagonal Power Switches Turn Off in a Staggered Manner
  • 2.3.Classification of Soft-Switching PWM Full-Bridge Converters
  • 2.4.Summary
  • Reference
  • 3.1.Topologies and Modulation Strategies of ZVS PWM Full-Bridge Converters
  • 3.1.1.Modulation of the Lagging Leg
  • 3.1.2.Modulation of the Leading Leg
  • 3.1.3.Modulation Strategies of the ZVS PWM Full-Bridge Converters
  • 3.2.Operating Principle of ZVS PWM Full-Bridge Converter
  • 3.3.ZVS Achievement of Leading and Lagging Legs
  • 3.3.1.Condition for Achieving ZVS.
  • 3.3.2.Condition for Achieving ZVS for the Leading Leg
  • 3.3.3.Condition for Achieving ZVS for the Lagging Leg
  • 3.4.Secondary Duty Cycle Loss
  • 3.5.Commutation of the Rectifier Diodes
  • 3.5.1.Full-Bridge Rectifier
  • 3.5.2.Full-Wave Rectifier
  • 3.6.Simplified Design Procedure and Example
  • 3.6.1.Turn Ratio of Transformer
  • 3.6.2.Resonant Inductor
  • 3.6.3.Output Filter Inductor and Capacitor
  • 3.6.4.Power Devices
  • 3.6.5.Load Range of ZVS
  • 3.7.Experimental Verification
  • 3.8.Summary
  • References
  • 4.1.Current-Enhancement Principle
  • 4.2.Auxiliary-Current-Source Network
  • 4.3.Operating Principle of a ZVS PWM Full-Bridge Converter with Auxiliary-Current-Source Network
  • 4.4.Conditions for Achieving ZVS in the Lagging Leg
  • 4.5.Parameter Design
  • 4.5.1.Parameter Selection for the Auxiliary-Current-Source Network
  • 4.5.2.Determination of Lr, Cr, and Ic
  • 4.5.3.Design Example.
  • 4.6.Secondary Duty Cycle Loss and Selection of Dead Time for the Drive Signals of the Lagging Leg
  • 4.6.1.Secondary Duty Cycle Loss
  • 4.6.2.Selection of Dead Time between Drive Signals of the Lagging Leg
  • 4.6.3.Comparison with Full-Bridge Converter with Saturable Inductor
  • 4.7.Experimental Verification
  • 4.8.Other Auxiliary-Current-Source Networks for ZVS PWM Full-Bridge Converters
  • 4.8.1.Auxiliary-Current-Source Networks with Uncontrolled Auxiliary Current Magnitude
  • 4.8.2.Auxiliary-Current-Source Networks with Controlled Auxiliary Current Magnitude
  • 4.8.3.Auxiliary-Current-Source Network with Auxiliary Current Magnitude Proportional to Primary Duty Cycle
  • 4.8.4.Auxiliary-Current-Source Network with Auxiliary Current Magnitude Adaptive to Load Current
  • 4.8.5.Auxiliary-Current-Source Networks with Adaptive Resonant Inductor Current
  • 4.9.Summary
  • References.
  • 5.1.Modulation Strategies and Topologies of a ZVZCS PWM Full-Bridge Converter
  • 5.1.1.Modulation of the Leading Leg
  • 5.1.2.Modulation of the Lagging Leg
  • 5.1.3.Modulation Strategies of ZVZCS PWM Full-Bridge Converters
  • 5.1.4.Method for Resetting the Primary Current at Zero State
  • 5.2.Operating Principle of a ZVZCS PWM Full-Bridge Converter
  • 5.3.Theoretical Analysis
  • 5.3.1.Peak Voltage of the Block Capacitor
  • 5.3.2.Achieving ZVS for the Leading Leg
  • 5.3.3.Maximum Effective Duty Cycle
  • 5.3.4.Achieving ZCS for the Lagging Leg
  • 5.3.5.Voltage Stress of the Lagging Leg
  • 5.3.6.Blocking Capacitor
  • 5.4.Simplified Design Procedure and Example
  • 5.4.1.Transformer Winding-Turns Ratio
  • 5.4.2.Calculation of Blocking Capacitance
  • 5.4.3.Verification of the Transformer Turns Ratio and Blocking Capacitance
  • 5.4.4.Dead Time between the Gate Drive Signals of the Leading Leg
  • 5.5.Experimental Verification
  • 5.6.Summary
  • References.
  • 6.1.Introduction
  • 6.2.Causes of Voltage Oscillation in the Output Rectifier Diode in ZVS PWM Full-Bridge Converters
  • 6.3.Voltage Oscillation Suppression Approaches
  • 6.3.1.RC Snubber
  • 6.3.2.RCD Snubber
  • 6.3.3.Active Clamp Circuit
  • 6.3.4.Auxiliary Winding of Transformer and Clamping Diode Circuit
  • 6.3.5.Clamping Diode Circuit
  • 6.4.Operating Principle of the Tr-Lead-Type ZVS PWM Full-Bridge Converter
  • 6.5.Operating Principle of the Tr-Lag-Type ZVS PWM Full-Bridge Converter
  • 6.6.Comparisons of Tr-Lead-Type and Tr-Lag-Type ZVS PWM Full-Bridge Converters
  • 6.6.1.Clamping Diode Conduction Times
  • 6.6.2.Achievement of ZVS
  • 6.6.3.Conduction Loss in Zero State
  • 6.6.4.Duty Cycle Loss
  • 6.6.5.Effect of the Blocking Capacitor
  • 6.7.Experimental Verification
  • 6.8.Summary
  • References
  • 7.1.Introduction
  • 7.2.Operating Principle of the ZVS PWM Full-Bridge Converter with Clamping Diodes under Light Load Conditions.
  • 7.2.1.Case I: 0.5Vin/Zr1 < ILf(t1)/K < Vin/Zr1 (Referring to Figure 7.2a)
  • 7.2.2.Case II: ILf/(t1)/K < 0.5Vin/4r1 (Referring to Figure 7.2b)
  • 7.3.Clamping Diode Current-Reset Scheme
  • 7.3.1.Reset Voltage Source
  • 7.3.2.Implementation of the Reset Voltage Source
  • 7.4.Operating Principle of the ZVS PWM Full-Bridge Converter with Current Transformer
  • 7.4.1.Operating Principle under Heavy Load Conditions
  • 7.4.2.Operating Principle under Light Load Conditions
  • 7.5.Choice of Current Transformer Winding-Turns Ratio
  • 7.5.1.Clamping Diode Current-Reset Time
  • 7.5.2.Output Rectifier Diode Voltage Stress
  • 7.5.3.Current Transformer Winding-Turns Ratio
  • 7.6.Experimental Verification
  • 7.7.Summary
  • References
  • 8.1.Operating Principle
  • 8.2.Realization of ZVS for the Switches
  • 8.3.Design Considerations
  • 8.3.1.Transformer Winding-Turns Ratio
  • 8.3.2.Output Filter Inductance
  • 8.3.3.Blocking Capacitor
  • 8.4.Experimental Verification.

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